Efficient Storage of Defect Maps for Nanoscale Memory

نویسندگان

  • Susmit Biswas
  • Tzvetan S. Metodi
  • Frederic T. Chong
  • Ryan Kastner
  • Tim Sherwood
چکیده

Nanoscale technology promises dramatic increases in device density, but reliability is decreased as a sideeffect. With bit-error rates projected to be as high as 10%, designing a usable nanoscale memory system poses a significant challenge. Storing defect information corresponding to every bit in the nanoscale device using a reliable storage bit is prohibitively costly. Using a Bloom filter to store a defect map provides better compression at the cost of a small false positive rate (usable memory mapped as defective). Using a list-based technique for storing defect maps performs well for correlated errors, but poorly for randomly distributed defects. In this paper, we propose an algorithm for partitioning correlated defects from random ones. The motivation is to store the correlated defects using rectangular ranges in a ternary content-addressable memory (TCAM) and random defects using a Bloom filter. We believe that a combination of Bloom filter and small size TCAM is more effective for storing defect map at high error rate. We show the results for different correlated distributions.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Reliable Nanowire Addressing via Randomized-Contact Decoders

In January of 2007, researchers from Caltech and UCLA demonstrated a nanoscale memory with 10 storage devices per cm [9]. This memory used a grid of nanoscale wires (NWs) to control bistable rotaxane molecules located at NW crosspoints. Similar crossbar-based storage technology, using larger feature sizes, was demonstrated by researchers at HP in 2004 [11]. In both cases the limiting factor on ...

متن کامل

Nanocomputing Architectures with Bloom Filters as Defect Maps

Significant progress has been made in the development of the emerging nanoscale computing devices. While the ultimate manufacturing process for such devices is uncertain, it is abundantly clear that future technology nodes will see an increase in defect rates. Therefore, it is of paramount importance to construct new architectures and design methodologies that can tolerate large numbers of defe...

متن کامل

Combining Circuit Level and System Level Techniques for Defect-Tolerant Nanoscale Architectures

Recent research progress on nanoscale devices such as based on nanowire (NW) crossbars shows great promise towards building nanoscale computing systems. This paper is part of our ongoing effort to develop and evaluate highdensity, defect-tolerant architectures on such fabrics. Our designs are based on Nanoscale Application Specific ICs (NASICs), and are primarily targeted towards microprocessor...

متن کامل

An Efficient LUT Design on FPGA for Memory-Based Multiplication

An efficient Lookup Table (LUT) design for memory-based multiplier is proposed.  This multiplier can be preferred in DSP computation where one of the inputs, which is filter coefficient to the multiplier, is fixed. In this design, all possible product terms of input multiplicand with the fixed coefficient are stored directly in memory. In contrast to an earlier proposition Odd Multiple Storage ...

متن کامل

Non-volatile molecular memory elements based on ambipolar nanotube field effect transistors

We have fabricated air-stable n-type, ambipolar carbon nanotube field effect transistors (CNFETs), and used them in nanoscale memory cells. N-type transistors are achieved by annealing of nanotubes in hydrogen gas and contacting them by cobalt electrodes. Scanning gate microscopy reveals that the bulk response of these devices is similar to gold-contacted p-CNFETs, confirming that Schottky barr...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2007